New, Fast and Efficient DO-254 Verification Methodology
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چکیده
This White Paper points out the most significant issues which can be encountered during DO-254 compliant verification process for FPGA designs. It proposes the methods of saving development time during the functional verification process, reusing the work done during RTL simulation and performing the in-hardware at-speed testing in target FPGA devices assuring at the same time a high visibility of results and traceability of requirements. New, Fast and Efficient DO-254 Verification Methodology Rev. 3.0 ©2009 Aldec Corporation August 12, 2009 Page 2 www.aldec.com Table of
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